1. Field of Invention
Apparatuses and methods consistent with the present invention relate to video processing and data processing, and more particularly, to video processing and data processing, whereby a loading speed of auxiliary video data is enhanced and the stability of an initial operation after power is supplied is improved.
2. Description of the Related Art
A video processing apparatus such as a television (TV) receives broadcasting signals of digital TV broadcasting and cable TV broadcasting from a broadcasting station, performs video processing of the received signals, and outputs video and sound.
FIG. 1 is a block diagram illustrating a schematic construction of a conventional video processing apparatus. The conventional video processing apparatus may comprise a central processing unit (CPU) 1 to conduct overall control of the apparatus and a scaler 3 to perform video processing of received video signals. In addition, the video processing apparatus may further comprise a first memory 5 to store therein data such as a main program of the video processing apparatus which is executed by the CPU 1, and a second memory 7 to store therein auxiliary video data such as an on-screen display (OSD) program. The first memory 5 and the second memory 7, which may be embodied as flash memories, are connected to and accessed by the CPU 1 and the scaler 3, respectively. The scaler 3 reads out auxiliary video data from the second memory 7 and processes the auxiliary video data along with received video data, to thereby output the auxiliary video data and the video data to be overlapped on a display unit (not shown) such as a display panel.
Data of the main program and data of the OSD program respectively stored in the first memory 5 and the second memory 7 are pre-loaded in the first memory 5 and the second memory 7 by a loading device (not shown) when the video processing apparatus is manufactured, and the first memory 5 and the second memory 7 in which the main program and the OSD program data are stored are installed on a circuit board (not shown). When the main program and the OSD program data need to be updated, data in the first memory 5 is loaded through the CPU 1 and auxiliary video data in the second memory 7 is loaded through the scaler 3.
However, since the scaler 3 is a circuit device whose main function is image processing, the speed that the scaler 3 transmits data to the second memory 7 is very slow, as compared with the CPU 1. For this reason, it takes much time to load the data in the second memory 7 through the scaler 3. Especially, considering the capacity of recent OSD programs is large, this causes a problem that excessive time is consumed in loading data in the second memory 7 through the scaler 3.
The conventional video processing apparatus of FIG. 1 may further comprise a power supply unit 9. The power supply unit 9 supplies a first power to the first memory 5 and the second memory 7 whereby power is constantly supplied, and a second power to the scaler 3 whereby power is not supplied at the standby state in power management. In this case, when the video processing apparatus is activated to regularly operate from the standby state, the second power is supplied to the scaler 3 and the CPU 1 initializes the scaler 3.
However, according to an inherent property of the scaler, in some cases, some time may be needed until the scaler 3 regularly operates after power supply. In case of the scaler 3 having this property, since the scaler 3 is directly connected to the second memory 7, data is transmitted to the scaler 3 from the second memory 7 even though the scaler 3 is not ready to regularly operate, thereby causing the video processing apparatus to malfunction.